Edinburgh, United Kingdom
Real-time intelligence, right at the edge.
FreunDo engineers lightweight AI acceleration for hearing aids and intelligent sensing systems, bringing clean speech, deterministic response, and privacy-focused processing directly onto compact hardware.
Our focus
AI capability without the cloud dependency.
Modern hearing devices need advanced intelligence while remaining tiny, responsive, private, and power efficient.
General-purpose processing often forces a compromise between model quality and real-world deployment. FreunDo bridges that gap through model-to-hardware co-design: restructuring lightweight neural networks for streaming FPGA inference, validating them under device constraints, and packaging the result as integration-ready acceleration IP and reference systems.
Start with a focused technical conversation.
- Share contexttarget device, workload, latency goal
- Evaluate fitdemo, benchmark, FPGA feasibility
- Move to PoCintegration plan, deliverables, support model
Deterministic
Predictable processing for time-critical audio paths.
Efficient
Compact models designed around constrained compute budgets.
Private
Sensitive audio remains on the device during inference.
Adaptable
Modular architecture for FPGA validation and future ASIC migration.
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From noisy speech to hardware-ready intelligence.
FreunDo connects the full path from real-world audio to low-power deployment: model design, streaming inference, FPGA validation, and product integration.
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Noisy speech enters the device as a continuous low-latency stream, preserving privacy by staying local.
Enhance
RFD suppresses noise frame by frame with causal attention and frequency-aware output handling.
Accelerate
Compact inference is mapped to FPGA-friendly hardware for deterministic response and low energy use.
Integrate
Reference RTL, SDK support, and partner engineering help teams move from proof of concept to product.
From research to integration
A practical path from model to manufacturable intelligence.
FreunDo works at the acceleration layer, complementing existing OEM products and silicon platforms rather than competing with finished-device brands.
AI accelerator IP and reference RTL
Parameterisable hardware blocks for quantised speech and sensor models, designed for low-latency streaming dataflow.
- Reference RTL architecture
- Quantised inference pipeline
- Performance and interface documentation
Reference RTL and FPGA implementation
Implementation packages that help silicon and device teams validate FreunDo acceleration inside a representative hardware environment.
- HLS/Vitis and RTL design files
- Vivado integration projects
- Benchmark and integration documentation
FPGA prototyping board and SDK
A partner-ready environment for evaluating RFD and other models with representative audio, microphone-array, and sensor data.
- Model conversion and quantisation
- FPGA inference and sensor I/O
- Customer model adaptation
PoC, NRE, and integration services
Joint engineering for application-specific models, target FPGA families, interfaces, and commercial product constraints.
- Paid proof-of-concept projects
- System integration and optimisation
- Licensing and production support
One core platform
Multiple real-time experiences
RFD speech enhancement
Clean speech through a compact, causal architecture.
Given noisy speech, RFD produces enhanced speech frame by frame. It is engineered for calls, recording, and hearing-assistance scenarios where response time, intelligibility, and energy use all matter.
RepConv reparameterisation
Expressive multi-branch blocks support training, then collapse into a leaner structure for efficient deployment.
Causal attention
The model uses present and past context without future look-ahead, enabling continuous low-latency streaming.
Frequency-heterogeneous head
Low and high frequency bands receive dedicated handling to preserve speech detail while suppressing broadband noise.
Independent test protocol
Quality measured on VCTK-DEMAND
RFD was evaluated on 824 test utterances at 16 kHz. The results show strong intelligibility and noise suppression across both low and high frequency bands.
at 16 kHz
Perceptual speech quality, where higher is better.
Short-time objective intelligibility, where higher is better.
Scale-invariant signal-to-noise ratio.
More than 95% of participants in an initial blind listening test in Edinburgh rated RFD positively for clarity, comfort, or background-noise reduction against comparison samples.
This early user study supports product direction but does not replace formal clinical or commercial validation.Deployment profile
Small enough for the edge. Capable enough for real speech.
The low compute footprint and compact deployed model support real-time inference on low-power chips, helping reduce heat and battery impact.
- Compute
- 28.3 MMAC/s
- Parameters
- 29k training
23.7k deployed - Latency design
- Causal streaming
No look-ahead - Audio format
- 16 kHz sample rate
16 ms hop
Market strategy
Focused first on hearing and assistive technology.
FreunDo enters through B2B partnerships, helping device and silicon companies add hardware-proven AI without rebuilding their complete product architecture.
- Start focusedhearing and assistive devices
- Validate quicklypaid PoC and FPGA evaluation
- Scale through IPlicensing, integration, production support
people worldwide currently experience some degree of hearing loss
WHOUK adults experience deafness, hearing loss, or tinnitus
RNIDhearing aids shipped by EHIMA member companies in 2024
EHIMAHearing and assistive devices
Speech enhancement for devices where natural sound, stringent latency, battery life, and local privacy are essential.
Voice and wearable intelligence
The same streaming architecture can extend to communication devices, wearable health systems, motion analytics, and industrial sensing.
Engagement model
A staged path that lowers integration risk.
- 01Evaluate
Define workload, target hardware, interfaces, and measurable success criteria.
- 02Prove
Deliver a paid proof of concept and validate quality, latency, and resource use.
- 03Integrate
Adapt the accelerator, firmware, and model to the partner's product architecture.
- 04Scale
Transition to IP licensing, royalties, and long-term production support.
Multidisciplinary by design
One team across model, signal, and hardware.
Zechun Deng
Company strategy, hardware development, product roadmap, and partner communication.
Dr Xin Feng
AI model development, software architecture, SDK, and model deployment workflow.
Yi Tian
Financial planning, funding strategy, commercial operations, and investor materials.
Karl Gandhi
Full Stack Engineer at Fandom.
Wayne Wan
Graduated from School of Physics and Astronomy, the University of Edinburgh & the University of Glasgow.
Usman Anwar
Telecommunication, engineering review, and research collaboration support.
Junhao Song
AI model design, and technical validation.
Our workflow spans model training, quantisation, high-level synthesis, RTL optimisation, FPGA verification, embedded interfaces, and application-level evaluation.
Bring the best real-time edge AI into your next device.
We welcome conversations with hearing technology companies, OEMs, ODMs, semiconductor teams, research partners, and intelligent sensing businesses.